1. Field of the Invention
The present invention relates generally to a signal processing apparatus for the control purpose. More particularly, the invention is concerned with a signal processing apparatus for controlling operation of an internal combustion engine or other prime mover which requires high-speed arithmetic operations for obtaining output data signals such as pulse width, duty cycle and other signals from digital and/or analog input signals on a real time basis by adopting a precise control method such as learning control or a like process.
2. Description of the Related Art
Heretofore, in the field of control for internal combustion engines or like prime movers, there have been demanded precise controls which can be effectuated by learning variety of control parameters involved in a fuel control, idling speed control (ISC), ignition control, purge control, exhaust gas recirculation (EGR) control and others in an effort to enhance control accuracy as well as control performance. In particular, in order to obtain the control data on a real time basis in the course of a high-speed operation of a multi-cylinder internal combustion engine, arithmetic operation of very high speed is demanded. For a better understanding of the present invention, background techniques thereof will be elucidated below in some detail.
FIG. 4 is a block diagram showing a known signal processing apparatus employed heretofore in the control of an internal combustion engine (hereinafter also referred to simply as the engine).
In this figure, a reference symbol AF designates an analog air flow rate signal which can be derived from the output of a thermal-type air flow sensor (AFS), and a reference symbol Ne designates a digital engine rotation speed signal which can be derived in the form of a pulse signal from the output of a rotation speed sensor at every crank angle of 180.degree.. Although only the air flow rate signal AF and the engine rotation speed (RPM) signal Ne are shown as typical signals which are utilized in the engine control, there may be employed other analog signals such as a water temperature signal, an intake air temperature signal and the like as well as other digital signals such as on/off signals derived from an idle switch, a starter switch and the like in the practical engine control. However, in the following description, it is assumed for the purpose of illustration only that the air flow rate signal AF and the engine rotation speed signal Ne are employed typically as the analog and digital input signals.
Referring to FIG. 4, a reference numeral 1 denotes a power supply source constituted by an onboard battery to which a signal processing apparatus generally denoted by a numeral 3 is connected through a key switch 2. As can be seen in the figure, the air flow rate signal AF and the engine rotation speed signal Ne mentioned above are input to the signal processing apparatus 3. On the other hand, connected to an output terminal of the signal processing apparatus 3 is a fuel injector 4 which is adapted to be driven by a pulse width signal P described hereinafter. Further connected to another output terminal of the signal processing apparatus 3 is an idling speed control valve (hereinafter also referred to as ISCV in abbreviation) 5 which is adapted to be driven by a speed regulation signal A. Although only the fuel injector 4 and the idling speed control valve or ISCV 5 are shown as the objects for the control, this is only for the purpose of illustration. There may be provided a desired number of objects for the control, as pointed out previously.
The signal processing apparatus 3 is comprised of various components, which will be described below.
An input interface (I/F) unit 31 for fetching various input signals including the AF signal and the Ne signal incorporates an analog input interface circuit 31a for fetching analog signals such as an air flow rate signal AF, and a digital input interface circuit 31b for fetching a digital signal such as the engine rotation speed signal Ne.
The input signals fetched through the input interface unit 31 as mentioned above are supplied to a central processing unit or CPU 32 which includes an analog-to-digital or A/D converter 32a.
Data obtained through arithmetic operations performed by the CPU 32 on the input signals are delivered to an output interface unit 33 which includes, in the case of the illustrated example, an fuel injector driver circuit 33a for outputting the pulse width signal P and an ISCV driver circuit 33b for outputting a speed regulation signal A.
A first constant-voltage regulated power supply circuit 34 is designed for generating a voltage in a range of 1 to 5 V is directly connected to the battery 1, while a second constant-voltage regulated power supply circuit 35 designed for supplying a constant voltage of 5 V is connected to the battery 1 through the key switch 2. A diode 36 is connected in the forward direction from the output terminal of the constant-voltage regulated power supply circuit 35 to that of the constant-voltage regulated power supply circuit 34. At this juncture, it should be mentioned that the constant-voltage regulated power supply circuit 34 is of a relatively small capacity and employed to supply an electric power only to the CPU 32. On the other hand, the constant-voltage regulated power supply circuit 35 is used for supplying an electric power not only to the input interface unit 31 and the output interface unit 33 but also to the CPU 32 via the diode 36 when the key switch 2 is in the closed state.
A power supply line B connected to the battery 1 through the key switch 2 is connected to the input interface unit 31 and the output interface unit 33 as well as to the fuel injector 4 and the ISCV 5.
A power supply interruption detecting circuit 37 is connected to the power supply line B for detecting lowering or drop in the voltage of the power supply line B. A power supply interruption detecting signal D outputted from this circuit 37 is supplied to the CPU 32.
Now, description will turn to operation of the hitherto known signal processing apparatus shown in FIG. 4.
The input signals such as the air flow rate signal AF, and the engine rotation speed signal Ne which are indicative of the engine operation state are inputted to the signal processing apparatus 3 through the input interface (I/F) unit 31, wherein the analog signal such as the air flow rate signal AF is processed by the analog interface (I/F) circuit 31a to be converted into a corresponding voltage signal, while the digital or discrete signal such as the engine rotation speed (RRM) signal Ne undergoes processing in the digital interface (I/F) circuit 31b to be converted into a corresponding digital voltage signal. The voltage signals output from the interface (I/F) circuits 31a and 31b are input to the CPU 32. In that case, the output voltage signal from the analog interface (I/F) circuit 31a is inputted to the CPU 32 by way of the A/D converter 32a, while the output signal of the digital interface (I/F) circuit 31b is directly supplied to the CPU 32.
The A/D converter 32a incorporated in the CPU 32 converts the analog signal inputted through, the analog interface circuit 31a into a digital signal by sampling the latter at a predetermined sampling frequency. Although only one analog input channel is shown, it should be understood that in practical applications, the A/C conversion is performed for a plurality of analog input signals by resorting to a multiplexing technique.
In general, the air flow rate analog signal is digitized by sampling it at an interval of one millisecond with other analog signals being sampled periodically at an interval of five milliseconds.
Of the output signals obtained through arithmetic operations performed by the CPU 32 on the input signals, one output signal is converted into the pulse width signal P generated in synchronism with the engine rotation speed signal Ne for driving the fuel injector 4 through the injector driver circuit 33a incorporated in the output interface 33 for thereby controlling the amount of fuel to be injected into the engine.
The other output signal of the CPU 32 is converted to the speed regulation signal A for regulating the engine rotation speed (rpm) to be constant at a desired speed for the idling operation of the engine by controlling the ISCV 5 through the ISCV driver circuit 33b and hence the amount or flow of air supplied to the engine. Parenthetically, the fuel control and the idling speed control (ISC) by themselves are known in the art. Accordingly, further description of these controls will be unnecessary.
When the key switch 1 is turned on, the constant-voltage regulated power supply circuit 35 is actuated to supply electric power to the input interface unit 31, the CPU 32 and the output interface unit 33 incorporated in the signal processing apparatus 3. On the other hand, the constant-voltage regulated power supply 34 which is of a smaller capacity when compared with that of the constant-voltage regulated supply circuit 34 operates independent of the on/off-state of the key switch 2 to supply constantly a small electric power to the CPU 32 even when the key switch 2 is in the off-state, in order to hold data and/or information stored in a memory incorporated in the CPU 32.
When the voltage on the power supply line B becomes lower or drops below a predetermined level upon turning-off of the key switch 2, the power supply interruption detecting circuit 37 produces a voltage drop signal (power supply interruption signal) D, which is then inputted to the CPU 32. In response to the voltage drop signal D, the CPU 32 assumes a stand-by state for saving power from further consumption and takes measures for holding the contents stored in the associated memory. In this conjunction, it should be noted that the memory incorporated in the CPU 32 serves for storing data or values acquired by learning, for example, through an O.sub.2 -sensor feedback control in the fuel injection control process as well as those learned through a rotation speed feedback control in the idling speed control process. These values or data held in the memory are constantly updated by the CPU 32 in dependence on predetermined engine operation states in order to realize the engine control with as high an accuracy as possible.
In the hitherto known signal processing apparatus described above, a single von-Neuman CPU is used for performing a variety of processings which are required to be executed on a real-time basis. As a consequence, the control performance is limited in dependence on the processing capability of the CPU, giving rise to a problem that the control performance is not to be satisfactory in respect to the processing speed as well as the accuracy as desired.